Technical Coursework







SYDE 192L

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Highlight: Implementing Traffic Light State Machine in VHDL


Task:

  • An intersection has two NS (North-South) and EW (East-West) streets
  • Each side side starts with 2 seconds of flashing green advance signal, followed by 5 seconds of solid green, 3 seconds of yellow and lastly solid red
  • Must ensure there is 1 second of red light on both side before granting green to other side
  • Since FPGA board only has green and red LEDs, consider flashing red as yellow signal
  • Use 10 Hz signal for flashing green and flashing red (yellow)
  • NS side = LEDG(7) & LEDR(0)
  • EW side = LEDG(4) & LEDR(4)
  • Show number of seconds spent on each state on HEX0
  • Display state number on HEX3
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SYDE 223

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Highlight: Implementing Binary Search Tree in C++


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SYDE 121

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Highlight: Red Light Green Light Game in C++


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